Radio frequency microelectromechanical (RF MEMS) technology uses moving sub-millimeter-sized parts to provide RF functionality. RF MEMS components (e.g., resonators, oscillators, switches, switched capacitors, varactors, etc.) are known to provide performance improvements in miniature volumes. For example, the high-Q and miniature size of RF MEMS resonators provides the opportunity for substantial miniaturization of RF filters and frequency references. As another example, the low loss and low capacitance of RF MEMS switches offer improved adaptability and switching functions. The packaging and integration of RF MEMS components factor significantly in their future applications in, for example, radar, communications, and sensing systems.
The packaging of MEMS components presents a unique challenge because these devices require an empty volume to function, and the cleanliness and environmental integrity of that volume impacts the device performance and reliability. Thus, the empty volume around MEMS components must be a hermetic microenvironment. Widespread use of MEMS components depends on the ability to combine cost-effective packaging with high-yield production. Additionally, in order to maintain device performance and impedance matching, the signal traces that provide external access to the packaged microenvironment should have low resistance and capacitance. These packaging requirements eliminate discrete individual packaging approaches such as injection molding and assembly of individual MEMS die into lidded ceramic or plastic packages. Wafer-level packaging offers the advantages of miniaturized volumes, lower cost packaging and higher production yields.
There are various known wafer-level approaches for providing a hermetic MEMS microenvironment. One approach bonds a (silicon or glass) lid wafer to a MEMS (silicon) wafer, and provides vias through the MEMS wafer for I/O interconnects to the microenvironment. Another approach provides vias through the lid wafer as I/O interconnects. A further approach seals the microenvironment with a hermetic membrane fabricated by removing a sacrificial layer. These known approaches disadvantageously require relatively costly, low-yield semiconductor fabrication process steps.
It is desirable in view of the foregoing to provide for lower cost, higher yield MEMS packaging techniques.